In secured computing systems, a secured computing device often communicates with one or more external devices. An external device typically comprises at least a memory device that stores program instructions to be executed by a processing core within the computing device. In cases in which the communication link between the computing device and the external devices is not secured, the secured computing device is often required to validate the integrity and authenticity of data received over the link. Authenticity validation means that a receiving device (e.g., a secured computing device) can verify that the data was sent from a legitimate source (e.g., an authorized memory device). Integrity means that the data was not altered before input to the receiving device. In the description that follows, and in the claims, the term “authentication” collectively refers to techniques that validate either data authenticity or integrity or both.
Methods for authentication of code and data stored in a device external to the computing environment are known in the art. For example, U.S. Patent Application Publication 2010/0070779, whose disclosure is incorporated herein by reference, describes a method for protecting the integrity of data ciphered by a ciphering algorithm providing at least an intermediary state meant to be identical in ciphering and in deciphering, this intermediary state being sampled during the ciphering to generate a signature. The disclosure more specifically applies to the protection of the privacy and of the integrity (or authenticity) of the content of a memory external to an integrated circuit considered as secure.
U.S. Pat. No. 8,108,941, whose disclosure is incorporated herein by reference, describes a processor, connected to a non-volatile memory storing first memory authentication information for authentication of the non-volatile memory. The processor includes an operation unit configured to perform an operation utilizing information stored in the non-volatile memory, an authentication memory formed integrally with the operation unit, and storing second memory authentication information for authentication of the non-volatile memory, an authentication information acquiring unit configured to acquire the first memory authentication information from the non-volatile memory, a memory authenticating unit configured to compare the first memory authentication information and the second memory authentication information to authenticate the non-volatile memory, and a memory access controlling unit configured to permit an access to the non-volatile memory when the memory authenticating unit succeeds in authentication.
U.S. Pat. No. 8,140,824, whose disclosure is incorporated herein by reference, describes a computer program product comprising a computer useable medium having a computer readable program for authentication of code, such as boot code. A memory addressing engine is employable to select a portion of a memory, as a function of a step value, as a first input hash value. The step value allows for the non-commutative cumulative hashing of a plurality of memory portions with a second input hash value, such as a previous hash value that has been rotated left. An authenticator circuit is employable to perform a hash upon the portion of memory and the second input hash value. A comparison circuit is then employable to compare an output of the authenticator circuit to an expected value.